#ifndef _USTC_CUSTOM_H_
#define _USTC_CUSTOM_H_


#if (S3C44B0_TEST_PLATFORM==0)		//use ARM I_BIT on A7S
#define USTC_IO_LOCK(I_BIT) I_BIT=disable_irq()
#define USTC_IO_UNLOCK(I_BIT) enable_irq(I_BIT)
#else
#define USTC_IO_LOCK(mask) mask=disable_INT_S3C(0x200000)
#define USTC_IO_UNLOCK(mask) enable_INT_S3C(mask)
#endif

extern USTC_U32 disable_INT_S3C(USTC_U32 mask);
extern void enable_INT_S3C(USTC_U32 mask);

extern void ustc_memcpy(void * p_des, const void * p_src, USTC_U32 size);
extern void ustc_memcpy_32(void * p_des, const void * p_src, USTC_U32 size);
extern void ustc_memset(void * p_des, int c, USTC_U32 size);
extern void ustc_memset32(void * p_des, int c, USTC_U32 size);
extern void ustc_delay(unsigned long count);
extern unsigned long disable_irq(void);
extern void enable_irq(unsigned long cpsr_i_bit);
extern void sensor_reset(unsigned int value);

#endif

